Ic Testing Methods and Apparatus

专利名称：Ic Testing Methods and Apparatus发明人：Tom Waayers,Johan C. Meirlevede,David P.

Price,Norbert Schomann,RuedigerSolbach,Herve Fleury,Jozef R. Poels

申请号：US12160211申请日：20070104

公开号：US20090003424A1公开日：20090101

专利附图：

摘要：A method is provided for testing an integrated circuit comprising multiplecores, with at least two cores having different associated first and second clock signals of

different frequencies. A test signal is provided using a clocked scan chain clocked at atest frequency (TCK). A transition is provided in a clock circuit reset signal (clockdiv_rst)which triggers the operation of a clock divider circuit () which derives the first and secondclock signals (clk_xx, clk_yy, clk_zz) from an internal clock () of the integrated circuit. Thefirst and second clock signals thus start at substantially the same time, and these areused during a test mode to perform a test of the integrated circuit. After test, the testresult is output using the clocked scan chain clocked at the test frequency (TCK).Clocking hardware is also provided, and these provide at-speed testing which enables onthe fly switching between a relatively slow tester driven clock for the shift modes andfaster clocks generated by on-chip PLLs and divider circuits for the test mode.

申请人：Tom Waayers,Johan C. Meirlevede,David P. Price,Norbert Schomann,RuedigerSolbach,Herve Fleury,Jozef R. Poels

地址：Sint Michielsgestel NL,Doorwerth NL,Totton GB,Rellingen DE,Hamburg DE,CaenFR,Beuningen NL

国籍：NL,NL,GB,DE,DE,FR,NL

更多信息请下载全文后查看