IC TESTING METHODS AND APPARATUS

专利名称：IC TESTING METHODS AND APPARATUS发明人：WAAYERS, Tom申请号：EP06809583.5申请日：20061012公开号：EP1943533B1公开日：20100623

摘要：A shift register circuit is provided for storing instruction data for the testing ofan integrated circuit core. The shift register circuit comprises a plurality of stages, eachstage comprising a serial input (si) and a serial output (so) and a parallel output(wir_output) comprising one terminal of a parallel output of the shift register circuit. Afirst shift register storage element (32) is for storing a signal received from the serialinput (si) and providing it to the serial output (so) in a scan chain mode of operation. Asecond parallel register storage element (38) is for storing a signal from the first shiftregister storage element (32) and providing it to the parallel output (wir_output) in anupdate mode of operation. The stage further comprises a feedback path (40) forproviding an inverted version of the parallel output (wir_output) to the first shift registerstorage element (32) in a test mode of operation. This configuration enables testing ofeach shift register stage using the existing control lines. In particular, the inverted signalcan be clocked to propagate through the shift register storage element and the parallelregister storage element, and the eventual inversion of the output is monitored toindicate that the inverted signal has propagated through the circuitry.

申请人：NXP B.V.

代理机构：Williamson, Paul Lewis

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