专利名称：Versatile system for PMOS I/O transistor
integration
发明人：PR Chidambaram申请号：US10171160申请日：20020613
公开号：US20030124790A1公开日：20030703
专利附图：
摘要：A system for fabricating an integrated circuit is disclosed in which a mixedvoltage device (), having a core gate () and a PMOS I/O gate () is formed on a substrate ().A positively doped silicate glass () is deposited on the mixed voltage device, and the coregate is processed. Finally, the source/drain region () of the high voltage PMOS I/O gate isimplanted with positive ions from the positively doped silicate glass that diffuse into thesubstrate at the PMOS I/O gate.
申请人：CHIDAMBARAM PR
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