通嘉LD7536

LD7536

11/8/2010 Green-Mode PWM Controller with Frequency Swapping and Integrated Protections Rev. 01 General Description The LD7536 is built-in with several functions, protection and EMI-improved solution in a tiny package. It takes less components counts or circuit space, especially ideal for those total solutions of low cost. The implemented functions include low startup current, green-mode power-saving operation, leading-edge blanking of the current sensing and internal slope compensation. It also features more protections like OLP (Over Load Protection) and OVP (Over Voltage Protection) to prevent circuit damage occurred under abnormal conditions. Furthermore, the Frequency Swapping function is to reduce the noise level and thus helps the power circuit designers to easily deal with the EMI filter design by spending minimum amount of component cost and developing time. Features z High-Voltage CMOS Process with Excellent ESD protection z Very Low Startup Current (<20μA) z Current Mode Control z Green Mode Control z UVLO (Under Voltage Lockout) z LEB (Leading-Edge Blanking) on CS Pin z Internal Frequency Swapping z Internal Slope Compensation z OVP (Over Voltage Protection) on Vcc Pin z OTP (Over Temperature Protection) through a NTC z OLP (Over Load Protection) z 300mA Driving Capability Applications z Switching AC/DC Adaptor and Battery Charger z Open Frame Switching Power Supply Typical Application 1

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LD7536-DS-01 APD November 2010

LD7536

SOT-26 (TOP VIEW) OUTVCCCSOTP 5Pin Configuration COMP 7 DIP-8 (TOP VIEW) GND NC 6 8 TOP MARK YYWWPP 1 2 3 4536 YWP pp 123GNDCOMPOTPVCCOUTNCCSOrdering Information Part number LD7536 GL LD7536 GN SOT-26 DIP-8 YY, Y : Year code (D: 2004, E: 2005…..) WW, W : Week code PP : Production code P36: LD7536 Shipping 3000 /tape & reel3600 /tube /CartonPackage Green Package Green Package Top Mark YWP/36 LD7536 GN Protection Mode Switching Freq. VCC OVP OLP OTP Pin 65kHz Latch Auto recovery/ 65ms Latch Pin Descriptions PIN SOT-26 PIN DIP-8 NAME FUNCTION 1 8 GND Ground Voltage feedback pin (same as the COMP pin in UC384X). Connect a 2 7 COMP photo-coupler to close the control loop and achieve the regulation. Pull this pin below 0.95V to shutdown the controller into latch mode until the AC 3 5 OTP resume power-on. Connecting this pin to ground with NTC will achieve OTP protection. Keep this pin float to disable the latch protection. 4 5 6 4 2 1 CS VCC OUT Current sense pin, connect it to sense the MOSFET current Supply voltage pin Gate drive output to drive the external MOSFET 2

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LD7536-DS-01 APD November 2010

LD7536

Block Diagram ∑ 3

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LD7536-DS-01 APD November 2010

LD7536

-0.3V ~29V -0.3V ~6V -0.3V ~Vcc+0.3V 150°C -20°C to 85°C -40°C to 125°C -65°C to 150°C 250°C/W 100°C/W 250mW 650mW 260°C 2.5 KV 250 V 300mA Absolute Maximum Ratings Supply Voltage VCC COMP, RT, CS OUT Maximum Junction Temperature Operating Ambient Temperature Operating Junction Temperature Storage Temperature Range Package Thermal Resistance (SOT-26, θJA) Package Thermal Resistance (DIP-8, θJA) Power Dissipation (SOT-26, at Ambient Temperature = 85°C) Power Dissipation (DIP-8, at Ambient Temperature = 85°C) Lead temperature (Soldering, 10sec) ESD Voltage Protection, Human Body Model ESD Voltage Protection, Machine Model Gate Output Current Caution: Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Recommended Operating Conditions Item Min. Max. Unit Supply Voltage Vcc Start-up resistor Value 11 0K 24 1.8 M V Ω 4

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LD7536-DS-01 APD November 2010

LD7536

Electrical Characteristics (TA = +25°C unless otherwise stated, VCC=15.0V) PARAMETER CONDITIONS MIN TYP MAX UNITSSupply Voltage (Vcc Pin) Startup Current =VCOMP0V Operating Current (with 1nF load on OUT pin) =VCOMP3V OLP Tripped/ Auto OVP Tripped/Latch OTP Pin Tripped/Latch Holding Current UVLO (off) UVLO (on) OVP Level Voltage Feedback (Comp Pin) Vcc=7V (latched) 12 20 μA 1.0 mA 2.0 mA 0.4 mA 9 0.85 0.85 430 10 11 mA mA μA V 15 16 17 V 25 26 27 V Short Circuit Current =VCOMP0V 0.25 mA Open Loop Voltage Green Mode Threshold VCOMP Zero Duty Threshold VCOMP Zero Duty Hysteresis Current Sensing (CS Pin) Maximum Input Voltage, VCS_OFF Leading Edge Blanking Time Internal Slope Compensation Input impedance Delay to Output Oscillator for Switching Frequency Frequency, FREQ Green Mode Frequency, FREQG Trembling Frequency Temp. Stability Voltage Stability 60 65 70 kHz 22 ± 4.0 kHz kHz 0% to DMAX. (Linearly increase) 0.8 0.85 0.9 V 1 230 300 100 ns mV MΩ ns COMP pin open 5.4 2.2 V V 1.4 V 100 mV (-20°C ~85°C) 5 % (VCC=11V-25V) 1 % 5

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LD7536-DS-01 APD November 2010

LD7536

PARAMETER CONDITIONS MIN TYP MAX UNITSGate Drive Output (OUT Pin) Output Low Level Output High Level Rising Time Falling Time Max. Duty OLP (Over Load Protection) OLP Trip Level OLP Delay Time OTP Pin Latch Protection (OTP Pin) OTP Pin Source Current Turn-On Trip Level Turn-Off Trip Level OTP pin de-bounce time On Chip OTP (Over Temperature) OTP Level OTP Hysteresis Soft Start Duration Soft Start Duration 2 ms 140 30 °C °C 77 1.00 85 1.05 92 1.10 μA V 4.3 4.5 4.7 V VCC=15V, Io=20mA VCC=15V, Io=20mA Load Capacitance=1000pF Load Capacitance=1000pF 8 -- 170 50 75 1 350 100 V V ns ns % 65 ms 0.9 0.95 1.0 V 250 μs 6

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LD7536-DS-01 APD November 2010

LD7536

12Typical Performance Characteristics 18.0 -40 017.211.2UVLO (on) (V) UVLO (off) (V) 16.410.415.69.614.88.814.0 40 80 8120 125-40040Temperature (°C) Fig. 1 UVLO (on) vs. TemperatureTemperature (°C) 80 120 125 Green Mode Frequency (KHz) 26Fig. 2 UVLO (off ) vs. Temperature 70 06824Frequency (KHz) 662220621860-40 40 80 120 12516-40040 80 120 125Temperature (°C) Fig. 3 Frequency vs. TemperatureTemperature (°C) Green Mode Frequency (KHz) 25Fig. 4 Green Mode Frequency vs. Temperature 70 6823Frequency (KHz) 6621 1962 1760111214161820222425151112141618Vcc (V) Vcc (V) 20 22 2425Fig. 5 Frequency vs. Vcc Fig. 6 Green Mode Frequency vs. Vcc 7

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LD7536-DS-01 APD November 2010

LD7536

0.90 85 VCS (off) (V) 800.88Max Duty (%) 750.86700.84650.8260 -40040801201250.80-40040 80 120 125Temperature (°C) Fig. 7 Max Duty vs. Temperature 18 ste 35Temperature (°C) Fig. 8 VCS (off) vs. Temperature 15 30VCC OVP (V) Istartup (μA) 122592063150-40 0 40 80 12012510-40040 80 120 125Temperature (°C) Fig. 9 Startup Current (Istartup) vs. Temperature Temperature (°C) 6.0Fig. 10 VCC OVP vs. Temperature 6.5 6.0 OLP (V) 5.0VCOMP (V) 5.5 4.55.04.04.5 3..0 -40 0 40801201253.0-40040Temperature (°C) Fig. 11 VCOMP open loop voltage vs. Temperature 80 120 125 Temperature (°C) Fig. 12 OLP-Trip Level vs. Temperature 8

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LD7536-DS-01 APD November 2010

LD7536

current. Lower startup current requirement on the PWM controller will help to increase the value of R1 and then reduce the power consumption on R1. By using CMOS process and the special circuit design, the maximum startup current for LD7536 is only 20μA. If a higher resistance value of the R1 is chosen, it will usually take more time to start up. To carefully select the value of R1 and C1 will optimize the power consumption and startup time. Application Information Operation Overview The LD7536 meets the green-power requirement and is intended for the use in those modern switching power suppliers and adaptors which demand higher power efficiency and power-saving. It integrated more functions to reduce the external components counts and the size. Its major features are described as below. Under Voltage Lockout (UVLO) An UVLO comparator is implemented in it to detect the voltage on the VCC pin. It would assure the supply voltage enough to turn on the LD7536 PWM controller and further to drive the power MOSFET. As shown in Fig. 13, a hysteresis is built in to prevent the shutdown from the voltage dip during startup. The turn-on and turn-off threshold level are set at 16.0V and 10.0V, respectively. VccUVLO(on)UVLO(off)EMI FiltertI(Vcc)operating current(~ mA)Fig. 14 Current Sensing and Leading-edge startup current(~uA)Blanking tThe typical current mode of PWM controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. As shown in Fig. 15, the LD7536 detects the primary MOSFET current from the CS pin, which is not only for the peak current mode control but also for the pulse-by-pulse current limit. The maximum voltage threshold of the current sensing pin is set at 0.85V. From above, the MOSFET peak current can be obtained from below. IPEAK(MAX)=0.85V RSFig. 13 Startup Current and Startup Circuit The typical startup circuit to generate VCC of the LD7536 is shown in Fig. 14. During the startup transient, the VCC is below UVLO threshold. Before it has sufficient voltage to develop OUT pulse to drive the power MOSFET, R1 will provide the startup current to charge the capacitor C1. Once VCC obtain enough voltage to turn on the LD7536 and further to deliver the gate drive signal, it will enable the auxiliary winding of the transformer to provide supply 9

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LD7536-DS-01 APD November 2010

eliminated externally. LD7536

A pull-high resistor is embedded internally and can be Fig. 15 A 230nS leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger from the current spike. In the low power application, if the total pulse width of the turn-on spikes is less than 230nS and the negative spike on the CS pin below -0.3V, the R-C filter is free to eliminate. (As shown in Fig.16). However, the total pulse width of the turn-on spike is determined according to output power, circuit design and PCB layout. It is strongly recommended to adopt a smaller R-C filter (as shown in Fig. 17) for larger power application to avoid the CS pin being damaged by the negative turn-on spike. Fig. 16 Output Stage and Maximum Duty-Cycle An output stage of a CMOS buffer, with typical 300mA driving capability, is incorporated to drive a power MOSFET directly. And the maximum duty-cycle of LD7536 is limited to 75% to avoid the transformer saturation. Voltage Feedback Loop The voltage feedback signal is provided from the TL431 at the secondary side through the photo-coupler to the COMP pin of the LD7536. Similar to UC3842, the LD7536 would carry a diode voltage offset at the stage to feed the voltage divider at the ratio of RA and RB, that is, RB×(VCOMP−VF) V−(PWMCOMPARATOR)=RA+RBFig. 17 10

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LD7536-DS-01 APD November 2010

LD7536

VCCUVLO(on)UVLO(off)OLPUVLO(off)OLP ResetInternal Slope Compensation In the conventional applications, the problem of the stability is a critical issue for current mode controlling, when it operates over 50% duty-cycle. As UC384X, It takes slope compensation from injecting the ramp signal of the RT/CT pin through a coupling capacitor. It therefore requires no extra design for the LD7536 since it has integrated it already. tCOMPOLP delay time4.5VOLP trip LevelOn/Off Control The LD7536 can be turned off by pulling COMP pin lower than 1.4V. The gate output pin of the LD7536 will be disabled immediately under such condition. The off-mode can be released when the pull-low signal is removed. tOUTSwitchingNon-SwitchingSwitchingt Fig. 18 Over Load Protection (OLP) - Auto OVP (Over Voltage Protection) on Vcc - Recovery To protect the circuit from damage due to over-load condition and short or open-loop condition, the LD7536 is implemented with smart OLP function. It also features auto recovery function, see Fig. 18 for the waveform. In case of fault condition, the feedback system will force the voltage loop toward the saturation and then pull the voltage high on COMP pin (VCOMP). When the VCOMP ramps up to the OLP threshold of 4.5V and continues over OLP delay time, the protection will be activated and then turn off the gate output to stop the switching of power circuit. With the protection mechanism, the average input power will be minimized to remain the component temperature and stress within the safe operating area. Latch mode The Vcc OVP function of LD7536 is in latch mode. As soon as the voltage of the Vcc pin rises above OVP threshold, the output gate drive circuit will be shutdown simultaneous to latch off the power MOSFET. On the contrast, if the voltage on Vcc pin drops below OVP threshold and starts AC-recycling again, it will soon resume to normal operation. Fig. 19 shows its operation. Fig. 19 11

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LD7536-DS-01 APD November 2010

LD7536

Green-Mode Operation By using the green-mode control, the switching frequency can be reduced under the light load condition. This feature helps to improve the efficiency in light load conditions. The green-mode control is Leadtrend Technology’s own property. OTP Pin --- Latched Mode Protection To protect the power circuit from damage due to system failure, over temperature protection (OTP) is required. The OTP circuit is implemented to sense a hot-spot of power circuit like power MOSFET or output rectifier. It can be easily achieved by connecting a NTC with OTP pin of LD7536. As the device temperature or ambient temperature rises, the resistance of NTC decreases. So, the voltage on the OTP pin could be written as below. VOTP=85μA⋅RNTC When the VOTP is below the defined voltage threshold (typ. 0.95V), LD7536 will shutdown the gate output and latch off the power supply. There are 2 conditions required to restart it successfully. First, cool down the circuit so that NTC resistance will increase and raise VOTP up above 1.05V. Then, remove the AC power cord and restart AC power-on recycling. Fault Protection There are several critical protections integrated in the LD7536 to prevent from damage to the power supply. Those damages usually come from open or short conditions on the pins of LD7536. In case under such conditions listed below, the gate output will turn off immediately to protect the power circuit. 1. 2. CS pin floating COMP pin floating Oscillator and Switching Frequency The LD536 is implemented with Frequency Swapping function which helps the power supply designers to both optimize EMI performance and lower system cost. The switching frequency substantially centers at 65KHz, and swap between a range of ±4KHz. 12

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LD7536-DS-01 APD November 2010

LD7536

F1L13.15A/250V120uHLL222mHR1KBP206CX10.22uFC5NCR951K/12062.2MEG/1206R22.2MEG/1206NC4 82uF/400V BR1330P/1206R3C1T1ARM8D520120C6102pF/1206R1051k/1206R1122R/120651R/120619V / 2.1A+VoReference Application Circuit --- 40W (19V/2.1A) Adapter C8470uF/25VC7470uF/25VC10104P/0805RTNDZ2/6.8VR5D1R40/0805GS1002FL620K/1206R6620K/1206D2PR1007U1ASMD ZENER1R325.6k/0805 T1BC114.7u/50VC12104P/08052COMPR31330/0805R255VCCR12BOUT6LD753610R/0805R12200R/0805D6D4148Q12SK35621K/0805IC432C173p/0805R2862K/0805R294.3k/0805PC817B3.3nF/0805C13CS43OTPGNDC13100P/08051R30/0805C14100PF/0805R16A1.4/1206R161.4/1206R16B1.4/1206CY1102PLD7536-DS-01 APD November 2010

R13100R/0805 Leadtrend Technology Corporation www.leadtrend.com.tw

13

LD7536

Package Information SOT-26 Symbol Dimension in Millimeters Min Max Dimensions in Inches Min Max A 2.692 3.099 0.106 0.122 B 1.397 1.803 0.055 0.071 C ------- 1.450 ------- 0.057 D 0.300 0.500 0.012 0.020 F 0.95 TYP 0.037 TYP H 0.080 0.2 0.003 0.010 I 0.050 0.150 0.002 0.006 J 2.600 3.000 0.102 0.118 M 0.300 0.600 0.012 0.024 θ 0° 10° 0° 10° 14

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LD7536-DS-01 APD November 2010

LD7536

Package Information DIP-8 Symbol Dimension in Millimeters Min Max Dimensions in Inches Min Max A 9.017 10.160 0.355 0.400 B 6.096 7.112 0.240 0.280 C ----- 5.334 ------ 0.210 D 0.356 0.584 0.014 0.023 E 1.143 1.778 0.045 0.070 F 2.337 2.743 0.092 0.108 I 2.921 3.556 0.115 0.140 J 7.366 8.255 0.29 0.325 L 0.381 ------ 0.015 -------- Important Notice Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should verify the datasheets are current and complete before placing order. 15

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LD7536-DS-01 APD November 2010

LD7536

Revision History Rev. Date Change Notice 00 2/25/2010 Original Specification 00a 3/15/2010 Start-up resistor value (max): 1.8M OTP source current (min.) 77μA 01 01 7/1/2010 11/8/2010 OLP trip level (min.) (max.) VCC OVP TC Curve for APD 16

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LD7536-DS-01 APD November 2010